This invention relates to semiconductor photolithography, and more particularly, to a method and apparatus for controlling photolithography exposures to minimize process variations at the edges of wafers.
As the performance requirements of semiconductor devices continue to increase, it is becoming ever more important to control process variations. Critical dimension (xe2x80x9cCDxe2x80x9d) variations across the surface of a wafer can significantly impact manufacturing yields and increase performance variations. As a result, it is important to maintain good CD control. As device geometries shrink, a higher degree of control is required. For example, although 10% control over the critical dimension may be acceptable with 0.35 xcexcm processes, 5% control may be required with 0.18 xcexcm processes.
Although critical dimension control can be difficult at any location on a wafer, it can be particularly challenging near the edge of the wafer. Variations in the critical dimension are therefore more difficult to control near the edges of wafers, primarily because of etch loading, non-uniformities in the thickness of photoresists or films coating the wafer, variations in the intensity of light reflected from the wafer, variations in the amount of material removed by chemical mechanical planarization (xe2x80x9cCMPxe2x80x9d), and non-uniformity of resist developing, all of which occur to a greater extent near the edge of the wafer. Excessive variations of the critical dimension resulting from these or other factors are most commonly found in isolated features, such as lines, since dense features generally have more process latitude.
The problem of controlling critical dimension variations, particularly near the wafer edge, has been recognized, but no entirely satisfactory solution has been developed. An article by Ackmann et al. entitled xe2x80x9cUse Of Exposure Compensation To Improve Performance For Speed And Binning Based On Electrical Parameter Feedback Into Fabrication Design, SPIE Vol. 3051, pp. 384-89, describes an xe2x80x9cExposure Compensationxe2x80x9d approach to controlling critical dimension variations. In Exposure Compensation, the power or dosage of the light source used to expose a photoresist coated wafer through a reticle is reduced near the edge of the wafer. Light at a higher power or dosage is then used to expose the remainder of the wafer. The light dosage may be adjusted by adjusting the intensity of the light, by adjusting the length of the exposure, or by making both adjustments. The use of lower light dosage at the wafer edge makes the width of lines and other features formed in a layer of photoresist coating the wafer wider at the wafer edges for positive tone resist. However, since etching of the resist after developing the resist is sometimes higher at the edge of the wafer, the width of lines and other features formed near the edge of the wafer can have the same width as lines and features formed by exposing other portions of the wafer using a higher light dosage. Although this Exposure Compensation technique may improve critical dimension uniformity at the wafer edge, it tends to affect both isolated features and dense features equally. Yet isolated features and dense features formed by photolithography are not etched in the same manner. If isolated features and dense features have the same exposure width, after etching the isolated features to the correct width, the dense features may be too wide. Conversely, if the dense features are etched to the correct width, the isolated features may be too narrow.
There is therefore a need for a photolithographic technique that can be used to limit critical dimension variations by exposing inner and outer fields of the wafer differently, but does so in a manner that affects isolated features and dense features differently at the wafer edge so that both dense and isolated features formed in the resist can have the correct widths near the wafer edge.
A method and apparatus for exposing a resist-coated semiconductor wafer to form features on the wafer. Inner fields of the wafer are exposed using light from a light source having a first characteristic that is unrelated to light intensity, such as a coherency value. Outer fields of the wafer adjacent the edge are exposed using light from the light source having a second characteristic that is also unrelated to light intensity, such as a coherency value. The light from the light source may have a variety of configurations, such as annular or multipole. The configuration of light used to expose the inner fields of the wafer preferably has a coherency value that is greater than the coherency value of the light that is used to expose the outer fields of the wafer. As a result, the widths of all features formed in the resist are larger at the edge than they would be toward the center of the wafer. However, after etching, the widths of the features formed in the resist are similar across the surface of the wafer because etching is more effective at the edge of the wafer.